Embedded System Access (ESA)
... more than JTAG
Advances in integration technologies, right through to 3D integrated circuits, make it possible today to create full systems on one chip in the form of an SoC (System-on-Chip). For this purpose, Embedded System Access (ESA) technologies are indispensable. This has made it possible to adopt entirely new approaches to holistic testing. These approaches include:
- Hierarchical testing (chip, board, unit)
- Product life cycle test (laboratory, production, field)
- System level testing (System JTAG, SJTAG)
ESA technologies are utilized both for testing chips, boards, and system assemblies, as well as for on-board programming of non-volatile memory:
- JTAG/Boundary Scan (BST)
- Processor Emulation Test (PET)
- Chip-embedded Instruments (IJTAG)
- Embedded Diagnostics Test (EDT)
- In-System Programming (ISP)
- FPGA-Assisted Programming (FAP)
- Core-Assisted Programming (CAP)
- In-Application Programming (IAP)
The common feature of these technologies is that they all use a serial test bus for communication purposes; their properties and methods differ, however.
The efficiency of an ESA strategy depends decisively on the performance of the used tester platform as well as on the basic product technologies.
To learn more about ESA, download our ESA White Paper or contact us to discuss details and how you can benefit from these technologies.