GOEPEL and SiliconAid join forces to provide Chip Level Debug in Board and System Environments

GOEPEL Electronics announces joint developments with SiliconAid Solutions in the area of chip level debug in board and system environments. GOEPEL and SiliconAid personnel were present at ITC in Anaheim, CA, last week to discuss details of these developments and the benefits of leveraging both technologies together.

GOEPEL offers a variety of test and inspection solutions for the electronics industry, specializing in JTAG based embedded system access (ESA) technologies, automated optical inspection (AOI) systems, solder paste inspection (SPI) systems, and in-line 3-D automated x-ray inspection (AXI) systems. At ITC 2012, the company is demonstrating embedded system access applications utilizing its SYSTEM CASCON platform.

SiliconAid is a specialist for JTAG based chip-level debug tools and was looking for a partnership with an industry leader in board test in order to bring its chip-focused debug tools to the board test community as well as allowing chip designers to debug their chip designs in board and system environments.

GOEPEL and SiliconAid decided to join forces to develop new capabilities that will benefit its respective customers throughout the entire product life cycle. The goal of the cooperation is the integration of the chip centric SiliconAid Debugger called JTD into GOEPEL’s SYSTEM CASCON platform based on a two-step approach. The first step is the ability to use GOEPEL JTAG/boundary-scan controller hardware, such as PicoTAP, SCAN BOOSTER, or SCANFLEX hardware, directly with SiliconAid’s JTD software. This first level of cooperation was demonstrated at GOEPEL’s booth during this year’s ITC.

The second, longer term, step will address the integration of JTD software within the SYSTEM CASCON platform. This will allow users to use the JTD software to focus on chip-level debug tasks, while the SYSTEM CASCON software manages the remaining board and system circuitry to provide test access to the chip under test.

We are excited about the prospect of offering our customers the ability to use SiliconAid’s chip-level debug tools in conjunction with our board and system focused JTAG / boundary-scan test and in-system programming solutions”, comments Heiko Ehrenberg, Managing Director of North American Operations at GOEPEL Electronics. “This fits in perfectly with our strategy of utilizing embedded system access technologies for test, debug, and programming applications throughout the entire product life cycle.

SiliconAid is excited to be collaborating with Goepel to extend our chip level JTAG expertise for those Customer’s products that have progressed through the product development cycle to board level implementations”, says Jim Johnson, President of SiliconAid Solutions. “This combination of technologies will allow customers to leverage chip level patterns and advanced chip level focused debug at the board level and correlate both environments. The cooperation between Goepel and SiliconAid will greatly enhance our Customer’s time and quality to market.

To learn more about the two companies and their respective products, or to get details about the proposed joint solutions, contact them through their respective websites.