Applications and Solutions

Impact of various illumination concepts on fault detection in optical inspection systems

Impact of various illumination concepts on fault detection in optical inspection systems

In the past, automated optical inspection systems (AOI) focused on increasing inspection speed along with the number of cameras and megapixels.  For a successful AOI process, however, false call rate and safe fault detection is as important as the overall inspection speed. Highly sophisticated optical inspection systems are equipped with various illumination modules. Fault detection and false calls reduction depends on the right selection of light-frequency, -angle and -intensity, not just  cameras and algorithms used.

Typical Applications:


  • Infra-Red for enhanced contrast on IC bodies


Infrared Illumination








  • Ultra-Violet for enhanced contrast on tin-plated surfaces


Ultraviolet illumination







  • Coaxial to avoid unwanted reflections


Coaxial illumination








  • Colored imaging for polarity tests


Colored imaging








  • Multi-Directional light for better OCR/OCV results


Multidirectional illumination








  • Optical filter for nano-coating defect detection


Optical lens filter









Although white orthogonal illumination is able to cover approximately 85% of all the inspection tasks, which include presence check and solder quality, there are applications where this simple top-white light will fail. Special lighting, infra-red light for low contrast component detection or ultra-violet illumination for enhanced fiducial mark detection, for example, can help in achieving an almost 100% test coverage.LEDs mounted at certain angles (0°, 30°, 45°, or 50°) can improve certain attributes of  the image of components and help reading labels or finding solder bridges. Conventional ring illumination modules, mounted around the light source, will always emit the light with an offset angle to the camera, which, in some cases,  can cause interfering reflections. A true top illumination, where the light source (LEDs) and image capturing device (camera) are aligned coaxial, will be able to suppress such interference and enhance contrast and recognition quality.

To meet today's challenges, an AOI system must be able to apply such varied illumination for each test step independently without sacrificing inspection speed. As a result the inspection system needs to be capable of flexibly and rapidly triggering light pulses with various directionality, intensities and wavelengths, while at the same time,  capturing resulting images and applying test algorithms in real-time.

GOEPEL and SiliconAid join forces to provide Chip Level Debug in Board and System Environments

GOEPEL Electronics announces joint developments with SiliconAid Solutions in the area of chip level debug in board and system environments. GOEPEL and SiliconAid personnel were present at ITC in Anaheim, CA, last week to discuss details of these developments and the benefits of leveraging both technologies together.

GOEPEL offers a variety of test and inspection solutions for the electronics industry, specializing in JTAG based embedded system access (ESA) technologies, automated optical inspection (AOI) systems, solder paste inspection (SPI) systems, and in-line 3-D automated x-ray inspection (AXI) systems. At ITC 2012, the company is demonstrating embedded system access applications utilizing its SYSTEM CASCON platform.

SiliconAid is a specialist for JTAG based chip-level debug tools and was looking for a partnership with an industry leader in board test in order to bring its chip-focused debug tools to the board test community as well as allowing chip designers to debug their chip designs in board and system environments.

GOEPEL and SiliconAid decided to join forces to develop new capabilities that will benefit its respective customers throughout the entire product life cycle. The goal of the cooperation is the integration of the chip centric SiliconAid Debugger called JTD into GOEPEL’s SYSTEM CASCON platform based on a two-step approach. The first step is the ability to use GOEPEL JTAG/boundary-scan controller hardware, such as PicoTAP, SCAN BOOSTER, or SCANFLEX hardware, directly with SiliconAid’s JTD software. This first level of cooperation was demonstrated at GOEPEL’s booth during this year’s ITC.

The second, longer term, step will address the integration of JTD software within the SYSTEM CASCON platform. This will allow users to use the JTD software to focus on chip-level debug tasks, while the SYSTEM CASCON software manages the remaining board and system circuitry to provide test access to the chip under test.

We are excited about the prospect of offering our customers the ability to use SiliconAid’s chip-level debug tools in conjunction with our board and system focused JTAG / boundary-scan test and in-system programming solutions”, comments Heiko Ehrenberg, Managing Director of North American Operations at GOEPEL Electronics. “This fits in perfectly with our strategy of utilizing embedded system access technologies for test, debug, and programming applications throughout the entire product life cycle.

SiliconAid is excited to be collaborating with Goepel to extend our chip level JTAG expertise for those Customer’s products that have progressed through the product development cycle to board level implementations”, says Jim Johnson, President of SiliconAid Solutions. “This combination of technologies will allow customers to leverage chip level patterns and advanced chip level focused debug at the board level and correlate both environments. The cooperation between Goepel and SiliconAid will greatly enhance our Customer’s time and quality to market.

To learn more about the two companies and their respective products, or to get details about the proposed joint solutions, contact them through their respective websites.

GOEPEL accelerates graphical Boundary Scan Project Development for Multi Board Designs

In cooperation with ASTER TechnologiesGOEPEL electronic has developed a new version of its ScanVision tool suite to solve the problem of multi-board design visualization at the layout and schematic level, enabling a significantly improved level of productivity in project development as well as fault analysis on the production stage.

The increasing utilization of JTAG / boundary-scan technology for the test of complete systems puts new demands on visualization tools, which we are able to meet with our enhanced ScanVision tools”, says Bettina Richter, GOEPEL electronic’s Marketing Manager. “Continuing the long-term cooperation with our partner ASTER, we facilitate the hierarchical utilization of boundary-scan resources throughout the entire product life cycle.

Christophe Lotz, President of ASTER Technologies says: “ASTER is proud to have strong relationships with our strategic partners and have the opportunity to work together in developing advanced technology to meet the ever increasing demands of the boundary scan market.

About the new ScanVision tool suite:

Basically, ScanVision™ consists of the three elements Layout Visualizer, Schematic Visualizer and Virtual Schematic Visualizer. All components are integral parts of the embedded system access (ESA) software SYSTEM CASCON™. A project data base, used consistently by the various tools in the SYSTEM CASCON platform, is generated by importing design data and is then available for comprehensive cross referencing. Tools such as the CASCON Board Merger™ and the CASCON Component Explorer™ are used to merge board design netlists and to associate device models with components that are part of the designs.

Using this information provides opportunities for interactive cross-probing between schematic and layout at pin, component, and net level, and for tracing signal paths even across multiple boards with dynamic switching of the layout or schematic display, assisting operations such as test coverage analysis, hardware debugging, and graphical fault display at board and system level.